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Microchip SHA104-MAVCZ-T is a symmetric-key CryptoAuthentication device with a pulse-width-modulated single-wire interface in an eight-pad thermally enhanced UDFN package with exposed backside paddle. LCDChip registers the package as 8-UFDFN Exposed Pad.
Confirm provisioning, single-wire host support, and the controlled package drawing before design release.
SHA104-MAVCZ-T is an accessory-side secure authenticator for challenge-and-response, ecosystem-control, and limited-use applications. Microchip's exact ordering-code table identifies MA as an eight-pad 2 mm × 3 mm × 0.6 mm thermally enhanced UDFN, V as the -40 °C to +105 °C grade, CZ as the single-wire option, and T as tape-and-reel supply. It uses hardware-backed SHA-256 message authentication and protected symmetric-key storage.
SHA-256 MAC operations can support device and accessory identity checks.
The proprietary PWM single-wire interface uses one serial I/O signal instead of separate I2C data and clock.
A symmetric secret is stored behind device security controls.
The eight-pad UDFN package is approximately 2 mm × 3 mm in body size.
Hardware-assisted SHA-256 MAC generation and an internal high-quality random-number generator.
Unique 72-bit serial number for device-specific identification.
384 bytes of user memory and a monotonic counter that can be linked to limited-use key operation.
Manufacturer-described active shield, memory encryption and scrambling, and voltage and temperature tamper measures.
The LCDChip catalog and package registry use 8-UFDFN Exposed Pad. Microchip's exact-model ordering example describes an eight-pad thermally enhanced UDFN with a 2 mm × 3 mm × 0.6 mm body. Its data sheet recommends connecting the exposed backside paddle to ground. Use the manufacturer's current land-pattern drawing for assembly.

The registered package JPG is missing locally and returns HTTP 404 on the production site. This draft cannot be published until the correct image is uploaded and visually verified.
Microchip's eight-pad UDFN top-view pin table identifies the CZ single-wire variant as follows:
No connect.
Ground reference.
PWM single-wire serial input/output.
No clock input on the single-wire option.
Supply input for VCC-powered operation.
The exposed backside paddle is recommended to be connected to GND. Microchip describes optional parasitic-power use for the SWI option; validate that mode separately before omitting a VCC connection.
| Security algorithm | SHA-256 symmetric message authentication |
|---|---|
| CZ interface | Proprietary PWM single-wire; up to 125 kbps |
| VCC supply range | 1.65 V to 5.5 V in VCC-powered operation |
| Temperature grade V | -40 °C to +105 °C |
| User memory | 384 bytes |
| Device identifier | Unique 72-bit serial number |
| Secret key | One symmetric key |
| Monotonic counter | Maximum count 10,000 |
| Sleep current | 130 nA nominal under data-sheet conditions |
| EEPROM data retention | >40 years at +55 °C, per reliability table |
| SWI-device HBM ESD | >7 kV, per manufacturer rating |
| Package | Eight-pad, 2 × 3 × 0.6 mm UDFN with exposed backside paddle |
Nominal and typical figures are not guaranteed limits. Confirm the exact electrical and timing conditions in Microchip's controlled data sheet, particularly if using parasitic power.
SHA104-MAVDA-T shares the general SHA104 family and UDFN size but uses I2C; its pad 5 is SDA and pad 6 is SCL, while this CZ variant uses SI/O at pad 5 and no clock at pad 6. It is not a firmware drop-in substitute. Other family ordering options also vary by package, provisioning, and supply format. Verify the exact interface, pin map, host command support, key provisioning, temperature range, and system authentication policy before considering any replacement. No unverified internal product link is asserted.
Microchip Technology's SHA104 CryptoAuthentication Summary Data Sheet, revision B, explicitly lists SHA104-MAVCZ-T as the eight-pad UDFN single-wire tape-and-reel variant. Use Microchip's latest controlled documentation for qualification, package drawings, and security configuration.
Verify replaceable peripherals using a protected symmetric key.
Support limited-use policies when the monotonic counter is configured appropriately.
Use challenge-response authentication to distinguish properly provisioned devices.
Reduce serial signal count in compact accessory designs with SWI.
Check the full ordering code, lot traceability, UDFN dimensions, and intended provisioning state during incoming inspection. Authentication is only as strong as the protected host-side key, trusted personalization process, and validated application protocol. A catalog listing does not independently prove the authenticity of stock.
No. The CZ ordering option is the PWM single-wire interface; DA is the I2C variant.
Pad 6 is no-connect for the SWI variant, according to Microchip's pin table.
Not while the registered package JPG is missing from the production site.
Use current Microchip controlled material for SWI timing, pullup, VCC or optional parasitic-power design, exposed-paddle assembly, security provisioning, and host-key protection. Evaluate the complete system under its operating and threat conditions. Restore and verify the missing package image before formal publication.
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