Intel N82586

The 82586 provides a command-driven Ethernet controller with on-chip transmit and receive control, buffer management and DMA. The host supplies memory, control and a compatible serial-interface chain. The Intel data sheet identifies the N82586 68-lead PLCC pinout separately from the 48-pin DIP version.

• Hardware CSMA/CD medium-access control for IEEE 802.3 and Ethernet systems.
• Command interface and automatic receive-buffer chaining.
• Bus-master operation with on-chip DMA for high-performance host designs.
• 8-bit and 16-bit microprocessor interface options.
• 68-lead PLCC form for existing N82586 footprints.

The Intel architecture includes a bus interface unit, command and receive units, four DMA channels, transmit and receive FIFOs, and serial transmitter/receiver logic. Network-management counters and internal/external loopback support diagnostics. System integration depends on the selected bus mode, memory map and external physical interface.

The original Intel pinout identifies N82586 as a 68-lead plastic leaded chip carrier. LCDChip records the package as 68-LCC (J-Lead); its registry maps this to 68-LCC and /upload/package/68-LCC.jpg. Match pin-one orientation, J-lead pitch, socket/land pattern and body dimensions to the controlled mechanical drawing.

Footprint checks

• Use the 68-lead PLCC pin-one marker.
• Check all power and ground positions.
• Confirm assembly or socket compatibility.

The registered package JPG is not present locally; do not release the page until the image and footprint are reviewed.

Intel's 68-pin table places RESET at pin 13 and serial signals TxD, TxC, RxD and RxC at pins 22, 23, 24 and 28. VCC occupies pins 8-11 and 61-62; VSS occupies pins 26-27 and 41-44. The multiplexed address/data bus, upper address outputs, bus-control pins, channel-attention input and interrupt output provide the host interface.

Use the original numbered Intel N82586 PLCC pin table for schematic checks; DIP pin numbers are different.

Electrical and timing limits must be taken from the original data-sheet tables and the applicable speed grade.

The N82586-10 is a different speed grade, and the P82586 uses a different package. Neither is an unconditional drop-in replacement. Compare exact markings, speed grade, pinout, host-bus mode, firmware command structures, external transceiver and qualification before substitution. No internal alternative product link is shown without record-level and engineering confirmation.

Intel's 82586 IEEE 802.3 Ethernet LAN Coprocessor data sheet, November 1991, order number 231246-007, documents the N82586 68-lead PLCC pinout and functions. A current DigiKey Marketplace listing identifies Altera as manufacturer for the same N82586 code, while the catalog and Intel original document identify Intel. Resolve the provenance discrepancy against physical markings and traceable documents before publication.

• Maintenance of legacy Ethernet controller boards.
• IEEE 802.3 CSMA/CD systems with compatible host and transceiver circuitry.
• Industrial and embedded network equipment using the original N82586 interface.
• Restoration of qualified 68-pin PLCC designs.

Inspect package markings, pin-one position, lead condition, date/lot code and documentation chain. Legacy stock may be marketplace inventory; verify storage, ESD handling and functional testing against the target board. A seller page does not by itself establish original Intel provenance.

Verify the original 68-pin PLCC diagram, all power/ground pins, host-bus timing, reset, command-attention sequence and external Ethernet interface before board release. The missing package JPG, conflicting manufacturer label and unverified current exact-code inventory/full price ladder block automatic publication.