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Microchip Technology KSZ8695PI is the lead-free industrial-temperature ordering code for the Micrel KS8695P integrated multi-port PCI gateway family. It combines an ARM9 processor, a 33 MHz 32-bit PCI interface, and five 10/100 Ethernet MAC/PHY ports. The manufacturer specifies a 289-pin PBGA package; the LCDChip package record is 289-BGA.
Match the exact KSZ8695PI ordering row and controlled 289-pin package drawing before board layout or replacement decisions.
KSZ8695PI integrates one WAN and four LAN Fast Ethernet interfaces with an ARM9 CPU, PCI bridge, switch engine, memory controller, and peripherals. The manufacturer positions the family for residential and small-office gateways. The exact KSZ8695PI ordering row identifies the industrial -40°C to +85°C lead-free variant in a 289-pin PBGA.
ARM9 CPU and switch functions reduce the number of separate gateway ICs.
One WAN and four LAN 10/100 ports include integrated PHY and MAC functions.
The 33 MHz, 32-bit PCI interface supports host or guest bridge modes.
Checksum offload, DMA, VLAN, QoS, and on-chip frame buffering support gateway traffic.
ARM9 core up to 166 MHz with 8 KB instruction and 8 KB data cache.
Five-port 10/100 switch with 802.1Q VLAN, prioritization, and IGMP snooping features.
Programmable 8-, 16-, or 32-bit paths for Flash, ROM, SRAM, SDRAM, and external I/O.
Sixteen GPIO, UART, two 32-bit timers, watchdog, JTAG, and PHY LED controls.
The original LCDChip API package is 289-BGA. The manufacturer's exact KSZ8695PI ordering table specifies 289-pin PBGA; its package information and feature list identify a 19 mm × 19 mm package. The package registry has an exact generic 289-BGA entry mapped to /upload/package/289-BGA.jpg. The local JPG is missing, and the production JPG returns HTTP 404. Use the manufacturer's PBGA drawing and ball map for mechanical dimensions, orientation, and land pattern rather than treating the generic registry label as a footprint.

The registered image must be supplied and visually checked before publication.
These ball names and locations come from the manufacturer's signal-description tables. Check the complete map for all multiplexed and power balls.
25 MHz reference-clock input for Ethernet and internal PLL operation.
Active-low device reset input.
Watchdog/system reset output; polarity depends on a reset-time strap.
JTAG signals on G14 / G15 / F14 / F15 respectively.
Differential WAN PHY transmit pair.
Differential WAN PHY receive pair.
Four LAN PHY differential transmit pairs; verify per-port assignment in the ball table.
Analog/core and analog/I/O supply groups; use the data-sheet ball list.
Several signals have reset-strap or alternate functions. Do not rely on this functional summary as a wiring diagram.
| Exact ordering code | KSZ8695PI, lead-free industrial variant |
|---|---|
| Operating-temperature range | -40°C to +85°C, ordering table |
| Manufacturer package | 289-pin PBGA, 19 mm × 19 mm |
| LCDChip package record | 289-BGA |
| Processor | ARM9 core, up to 166 MHz |
| Ethernet ports | Five 10/100 MAC/PHY ports: one WAN, four LAN |
| PCI interface | 33 MHz, 32-bit, PCI version 2.1 |
| Frame buffer | 64 KB on-chip SRAM |
| Memory bus options | 8-, 16-, and 32-bit programmable data paths |
| Total memory space | Up to 64 MB, including external memory and I/O |
| Power domains | 1.8 V core/Ethernet RX and 3.3 V I/O/Ethernet TX, per data sheet |
| System reference clock | 25 MHz ±50 ppm at XCLK1, per manufacturer pin description |
Figures describe manufacturer-supported modes or limits under stated conditions; do not treat peak CPU/bus rates as guaranteed simultaneous application performance.
The manufacturer ordering table lists KS8695PI as the standard industrial code and KSZ8695PI as the lead-free industrial code in the same 289-pin PBGA family. That relationship does not by itself establish a drop-in replacement for a specific board; verify lead finish, environmental requirements, stepping, firmware, reset straps, power, PCI mode, and full ball map. Commercial-temperature KSZ8695P has a different 0°C to +70°C rating. No unverified LCDChip substitute link is asserted.
Microchip hosts the Micrel KS8695P Revision 1.5 data sheet, including the exact KSZ8695PI ordering row, architecture, functional signal tables, electrical information, and PBGA package data. Confirm current lifecycle and documentation with the manufacturer for any new design.
Integrate WAN routing and four LAN connections in residential or small-office equipment.
Use PCI expansion for an appropriately supported wireless subsystem.
Apply VLAN, QoS, and switch control to multi-port network endpoints.
Maintain an already-qualified industrial-temperature board after checking revision and package.
Verify KSZ8695PI marking, lot traceability, lead-free industrial ordering status, and 289-pin PBGA geometry against controlled manufacturer documentation. Confirm the package and orientation on physical parts; a generic package illustration alone is not an authenticity check.
Five 10/100 MAC/PHY ports: one WAN and four LAN.
KSZ8695PI is the lead-free industrial-temperature variant in the manufacturer table, rated -40°C to +85°C.
No. The manufacturer specifies a 289-pin PBGA and provides the drawing and ball map needed for PCB layout.
No. The registered production package JPG currently returns HTTP 404 and requires correction and review.
Validate exact ball assignments, reset-strap behavior, supply sequencing, 25 MHz clock tolerance, PCI role, Ethernet magnetics, and external memory timing against the Micrel/Microchip data sheet. The registered production JPG is missing. Keep this content in review until the image and full page presentation are verified.
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