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The Harris/Intersil HSP45256/883 is a configurable 256-tap binary correlator for one- or two-dimensional pattern matching. The GM-20/883 ordering row specifies an 85-lead ceramic PGA and -55 °C to +125 °C temperature range.
Match the complete suffix and original lot documentation. This legacy device and its ceramic package require manual sourcing and footprint review.
The HSP45256 correlation array comprises eight 32-tap stages. The stages can be configured for a one-bit reference against 1-, 2-, 4- or 8-bit data. Depending on data width, the effective length is 256, 128, 64 or 32 taps. Multiple chips can be cascaded to extend the correlation length, while mask bits exclude selected taps from the score.
Eight 32-tap stages support several correlation lengths and input precision choices.
Configurable windows support one- and two-dimensional matching.
CASIN and CASOUT buses allow correlation scores to be cascaded across devices.
Double-buffered control and reference registers allow new settings to load during an active correlation.
Programmable reference data and per-tap mask bits shape the correlation window.
Weight/sum and offset stages transform the raw correlation score.
A selectable delay simplifies latency alignment when several correlators are cascaded.
A microprocessor interface writes configuration registers independently of the data and reference paths.
The exact GM-20/883 ordering row calls for an 85-lead ceramic pin-grid array, G85. The catalog label is 85-BCPGA, which appears in the package workbook at row 1940, but `/upload/package/85-BCPGA.jpg` is absent locally. Confirm pin-one index, ceramic body, socket pattern and package drawing against the manufacturer PGA pinout before design or publication.

The registered local JPG is missing; the detail remains unpublished.
The manufacturer's 85-pin PGA top and bottom views govern every coordinate. The groups below summarize functional buses and are not a pin map.
DIN0-7 samples data on the positive CLK edge; DREF inputs load the reference.
DOUT and AUXOUT report selected results according to configuration.
CASIN0-12 and CASOUT0-12 combine scores across correlators.
DCONT, address, load and transfer pins program and activate mask/reference data. Observe every VCC and GND pin.
| Exact order code | HSP45256GM-20/883 |
|---|---|
| Original manufacturer | Harris Semiconductor; Intersil documentation |
| Function | Configurable binary correlator |
| Correlation stages | Eight stages of 32 taps; 256 taps maximum |
| Reference width | 1 bit |
| Data widths | 1, 2, 4 or 8 bits by configuration |
| Correlation length | Up to 256, 128, 64 or 32 taps according to width |
| Cascade bus | 13-bit CASIN/CASOUT |
| Supply | +5 V per manufacturer pin description |
| Temperature range | -55 °C to +125 °C, exact /883 ordering row |
| Package | 85-lead CPGA, G85; catalog 85-BCPGA |
| Screening | /883 designation; confirm lot-specific certificate |
Consult the controlled manufacturer document for the GM-20 speed-grade timing, test conditions and pin coordinates.
Commercial HSP45256 variants and faster speed grades are not automatic replacements for an /883-qualified ceramic PGA. Compare screening level, package G85, pinout, temperature range, clock timing, reference/mask configuration, cascade latency and system software. No internal alternative product link is included without a verified database match and engineering equivalence.
The original Harris/Intersil HSP45256/883 data sheet gives the GM-20/883 ordering row, architecture, pin views and electrical characteristics. Archived third-party copies reproduce this manufacturer-origin document; current manufacturer-hosted availability and revision control require manual confirmation. Distributor listings must be checked against the original lot and screening documents.
Binary correlation and pattern detection in established signal-processing chains.
Reference-pattern matching in qualified communications equipment.
One- or two-dimensional matching with programmable window size.
Exact-part maintenance where /883 screening and temperature range are required.
Request lot traceability, /883 screening and conformity documentation, date code and storage history. Inspect the ceramic body, markings and all PGA pins. Validate the device in the target clock and cascade configuration; a generic HSP45256 or relabeled lot is not a qualified substitute.
It computes binary correlation scores with a configurable array of up to 256 taps.
Yes. CASIN/CASOUT buses support cascaded scores with a programmable alignment delay.
The GM-20/883 ordering row specifies an 85-lead CPGA, package G85.
No. The registered 85-BCPGA image is missing locally.
Keep this record in manual review until the original /883 document revision, speed-grade timing, live distributor stock and tier pricing, screening certificate, G85 package artwork and local JPG are verified. Human content review is required before any publication.
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