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The Holt Integrated Circuits HI-3588PCIF receives ARINC 429 bus data and presents it to a host through a four-wire serial peripheral interface. This exact ordering code is a 44-pin plastic 7 mm × 7 mm QFN device, recorded by LCDChip as 44-VFQFN Exposed Pad.
Qualify the exact ordering code, package drawing, and current Holt documentation before production use.
HI-3588 is an ARINC 429 receiver for avionics interface designs. It converts incoming differential bus signals into received words that a microcontroller can read through its SPI port. A programmable label-recognition function, a 32-word by 32-bit receive FIFO, and a configurable receive flag help the host filter and manage traffic. The PCIF ordering option identifies Holt's commercial-temperature 44-pin QFN version.
Differential receiver inputs support an ARINC 429 receive channel.
Four-wire SPI exchanges control and received data with a compatible controller.
Programmable recognition can screen the 256 possible ARINC labels.
A 32 × 32-bit FIFO reduces the need for immediate host service on every received word.
Analog ARINC 429 input circuitry and digital word handling are integrated in one receiver device.
The host can program recognition across all 256 label values.
RFLAG can be configured for FIFO-related status signaling.
Programmable data-rate operation supports the timing options specified in Holt's data sheet.
The LCDChip product record specifies 44-VFQFN Exposed Pad. Holt identifies HI-3588PCIF as a 44-pin plastic 7 mm × 7 mm QFN with a commercial -40°C to +85°C temperature range. Match the manufacturer's mechanical drawing, pad dimensions, exposed-pad guidance, and top-view pin orientation to the actual board footprint.

Package image pending: this registered JPG is currently unavailable on the production site. Use the controlled Holt package drawing for mechanical qualification.
Holt's HI-3588 44-pin QFN top-view pin diagram identifies these functional connections:
Negative ARINC receive input options; use the external 40 kΩ path only as specified in the data sheet.
Master reset input.
SPI serial data input, active-low chip select, and serial clock.
Ground connections; connect both as instructed by Holt.
ARINC timing-clock connection and SPI serial data output.
Programmable receive FIFO flag output.
Logic supply connection.
Positive ARINC receive input options.
Remaining positions shown as N/C in the Holt pin diagram must be handled according to the manufacturer's package and connection guidance. Do not infer pad wiring from a generic QFN photograph.
| Device function | ARINC 429 receiver |
|---|---|
| Host interface | Four-wire SPI |
| Receive FIFO | 32 words × 32 bits |
| Label recognition | Programmable across 256 ARINC labels |
| Receive indication | Configurable RFLAG status output |
| Logic supply | 3.3 V or 5 V operation per the manufacturer's electrical conditions |
| Data-rate control | Programmable; verify operating mode and ACLK timing in the data sheet |
| Operating temperature | -40°C to +85°C for HI-3588PCIF |
| Package | 44-pin plastic 7 mm × 7 mm QFN; LCDChip record: 44-VFQFN Exposed Pad |
| Environmental listing | Holt lists the PCIF ordering code as RoHS compliant |
| Moisture sensitivity | Holt lists MSL 3 for the PCIF ordering code |
Electrical limits, input thresholds, timing, and absolute maximum ratings are conditional values; use Holt's current data sheet rather than these summary specifications for design sign-off.
A candidate replacement must match ARINC receive behavior, SPI protocol and timing, input network, supply, FIFO and label programming, temperature grade, and the exact QFN pinout and land pattern. Other HI-3588 ordering codes may differ in package or qualification. No unverified LCDChip alternative-product link is asserted here.
Holt Integrated Circuits publishes the HI-3588 family documentation and identifies HI-3588PCIF as the 44-pin plastic QFN commercial-temperature ordering option. Consult Holt's HI-3588 product page, ordering information, Rev. H data sheet, and any subsequent manufacturer notices for controlled specifications.
Receive ARINC 429 words for processing by a host controller.
Bridge an ARINC receive channel to an SPI-capable processor in a qualified design.
Use label recognition and buffered reading in bus-monitoring equipment.
Capture selected receive data and FIFO status for system supervision.
Confirm the full HI-3588PCIF ordering code, device marking, lot traceability, package dimensions, MSL handling, and applicable manufacturer documentation. A generic package image cannot authenticate the device or substitute for electrical and receiving inspection.
No. Holt describes the HI-3588 as an ARINC 429 receiver with an SPI host interface.
It buffers up to 32 received 32-bit words so the host can read them over SPI according to the manufacturer's protocol.
Yes. The device supports programmable recognition of ARINC label values; configure the table as Holt specifies.
The exact PCIF option is a 44-pin 7 mm × 7 mm plastic QFN. Check Holt's drawing and the recorded 44-VFQFN Exposed Pad designation before layout release.
Validate the ARINC input coupling and external resistors, SPI mode and timing, ACLK source, reset sequence, power decoupling, unused pins, exposed pad, and the exact PCIF temperature and package markings against current Holt material. The registered package JPG is not available on the production website; supply and verify that asset before publishing this page.
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