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Microchip HCS500-I/SM is an industrial-temperature KEELOQ code-hopping decoder for compatible remote keyless entry and access-control receivers. The /SM ordering designation is an 8-lead SOIJ package, not the narrow-body 8-SOIC shown in the local package registry.
Resolve the package naming and drawing mismatch before using this listing for board-layout decisions.
The HCS500 validates transmissions from compatible KEELOQ encoders. It supports normal and secure learning, stores up to seven transmitter records using an external EEPROM, and can operate stand-alone or exchange data with a host microcontroller over a synchronous serial interface.
KEELOQ code-hopping decoding and error checks help reject invalid transmissions.
Normal and secure learning options support different provisioning procedures.
S_DAT and S_CLK support a synchronous interface to a controller.
The I designation covers -40°C to +85°C ambient operation.
3.0 V to 5.5 V, with an internal oscillator.
Automatic bit-rate detection for compatible PWM encoder transmissions.
Up to seven learned transmitters; external EEPROM is required for encrypted record storage.
RF input, EEPROM clock/data, reset and synchronous host clock/data connections.
Microchip data sheet DS40000153E describes /SM as an 8-lead SOIJ and shows an approximately 5.28 mm body. The catalog says 8-SOIC (0.209 in, 5.30 mm width), while the local registry's 8-SOIC entry is a different 0.154 in (3.90 mm) narrow-body package. These names cannot be treated as interchangeable.
No verified local SOIJ JPG is available; the package image remains unresolved.
Microchip shows the same HCS500 signal assignment for the 8-lead PDIP and SOIJ drawings.
| Function | KEELOQ code-hopping decoder |
|---|---|
| Operating supply | 3.0 V to 5.5 V |
| Temperature designation | Industrial I: -40°C to +85°C |
| Manufacturer package code | SM: 8-lead SOIJ |
| Learned transmitters | Up to seven |
| Record storage | External EEPROM |
| Compatible modulation | PWM, 1/3–2/3 format |
| Encoder element time | 100 µs to 400 µs |
| Serial number | 28 bits |
| Synchronization counter | 16 bits |
| Code-word length | 66 to 69 bits |
Protocol figures describe compatible encoder settings, not universal compatibility with every transmitter.
Other HCS500 order codes may vary in temperature grade and package. A PDIP variant is not footprint-compatible with /SM. Other decoder families may require different external memory, provisioning, protocol timing or host firmware. Verify all of these before substitution; no unverified part is presented as a drop-in replacement.
Microchip Technology documents the HCS500 in data sheet DS40000153E, revision E. Its product identification system defines the I industrial temperature code and SM SOIJ package. Review the latest package specification as well as the functional data sheet before finalizing a footprint.
Receivers using compatible KEELOQ encoders.
Gate, garage and electronic door-lock systems.
Alarm and immobilizer receiver architectures.
Systems that enroll and validate code-hopping transmitters.
Verify the complete marking, industrial grade, SOIJ body and traceability. Keep an HCS500 paired with its programmed EEPROM as directed by Microchip, and validate learning and decoding using the intended transmitter keys and receiver hardware.
Microchip identifies /SM as the SOIJ package option, not a generic narrow-body SOIC.
I is the industrial temperature designation, -40°C to +85°C.
Yes. The data sheet specifies external EEPROM for encrypted transmitter information and recommends in-circuit programming of the matched pair.
No. The registry image represents a 3.90 mm narrow body and is not verified for the /SM SOIJ device.
Resolve the catalog/package-registry conflict and obtain the correct SOIJ drawing before publication or PCB design. Confirm current Microchip electrical limits, encoder settings, EEPROM pairing, provisioning and host-interface timing. This page does not replace the manufacturer's data sheet or receiver qualification.
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