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The Analog Devices / Maxim Integrated DS34T104GN combines four E1/T1/J1 line interfaces and framers with packet transport functions in a 484-ball TEBGA package. The LCDChip package registry describes the footprint as 484-BGA.
Technical functions and the exact order code were checked against the manufacturer's DS34T101–DS34T108 Rev. 4 data sheet. Confirm board-level limits in that document before design release.
DS34T104GN is the four-port member of the DS34T101–DS34T108 circuit-emulation family. It integrates E1/T1/J1 line-interface and framer functions, TDM packetization, clock recovery and a 10/100 Ethernet MAC for carrying synchronous circuits across a packet network.
Combines four LIU and framer channels for E1/T1/J1 circuits.
Maps legacy TDM services to packet transport without treating the Ethernet link as a native TDM line.
Clock-recovery functions support timing reconstruction for circuit emulation.
Includes a 10/100 Ethernet MAC in the transport architecture.
Four E1/T1/J1 LIUs and framers.
Manufacturer-documented SAToP, CESoPSN and TDMoIP modes.
10/100 Ethernet MAC with packet transport functions.
484 TEBGA per manufacturer; 484-BGA in the existing LCDChip package registry.
The manufacturer lists DS34T104GN in a 484-ball thermally enhanced BGA (TEBGA). The existing product and package registry use the broader name 484-BGA. Verify ball map, outline, thermal design and land pattern from the manufacturer's package drawings before PCB release.

The registered package JPG is not yet available on the production site; the illustration is awaiting upload and visual verification. This draft must not be published while the image returns 404.
The manufacturer data sheet identifies these signal groups for the DS34T104 family; use its ball-assignment tables for exact ball locations.
Signal suffix n denotes a channel index, not a package ball number. Check the exact four-port ball map and electrical tables in Rev. 4; do not infer unused channels from the eight-port variant.
| Exact order code | DS34T104GN |
|---|---|
| Device function | E1/T1/J1 TDM-over-packet processor |
| Integrated E1/T1/J1 channels | 4 |
| Line interface | Integrated LIU and framer per channel |
| Circuit-emulation methods | SAToP, CESoPSN and TDMoIP supported by the family |
| Independent bundles | Up to 64, subject to configuration and data-sheet limits |
| Ethernet MAC | 10/100 Mbit/s |
| Core supply class | 1.8 V |
| I/O supply class | 3.3 V |
| Specified operating temperature | -40 °C to +85 °C |
| Manufacturer package | 484 TEBGA |
| LCDChip registered package | 484-BGA |
Supply entries describe nominal voltage classes, not absolute maximum or tolerance limits. Consult the manufacturer's recommended-operating and electrical-characteristics tables for numeric design margins.
Other DS34T10x family members differ in port count and possibly ball use or configuration. Compare exact order code, port population, power domains, firmware settings, clock architecture, package drawing and temperature grade before considering a substitution. No unverified LCDChip alternative is linked here; a shared family name is not evidence of drop-in compatibility.
This order code is documented by Analog Devices under the Maxim Integrated DS34T101–DS34T108 data-sheet family. Use the current manufacturer-controlled data sheet, errata and product notices for final component approval.
Transport E1/T1/J1 services over a packet network while managing reconstructed timing.
Connect existing synchronous-service equipment to Ethernet-based infrastructure.
Aggregate four circuit interfaces in a packet-network gateway design.
Confirm the full DS34T104GN marking and traceability documents against the purchase order. Inspect packaging, moisture-sensitive handling and storage conditions before assembly. Electrical acceptance and qualification must follow the manufacturer's current documentation and the buyer's approved process.
Four integrated LIU and framer channels.
No. It is a related eight-port family member; confirm all functional and ball-map differences before substitution.
The manufacturer calls it 484 TEBGA; the existing LCDChip registry uses 484-BGA.
No. The expected production JPG is currently unavailable and requires verification before publication.
This description is a selection aid, not a substitute for the manufacturer's detailed electrical, timing, thermal, pin-assignment and package specifications. Resolve the registered 484-BGA versus manufacturer 484 TEBGA naming at mechanical review, and supply a verified package illustration before making this page public.
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