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Microchip Technology ATAES132A-MAHEQ-S combines 32 Kbit serial EEPROM with AES-128 security functions. This exact EQ option uses SPI in an eight-pad exposed-paddle UDFN package, registered by LCDChip as 8-UFDFN Exposed Pad.
Confirm SPI host timing, key personalization, access policy, and controlled package footprint before production use.
ATAES132A-MAHEQ-S is a secure serial EEPROM with authentication and confidential nonvolatile storage capabilities. Microchip's exact ordering table identifies MAH as the 8MA2 UDFN, EQ as SPI, and S as a small tape-and-reel option. Its 32 Kbit user memory is organized as 16 independently controlled 2 Kbit zones, allowing different access restrictions for data and keys.
Sixteen separately configured user zones can require authentication or encrypted access.
The AES-128 engine supports AES-CCM authentication, message authentication codes, and data protection.
SPI-mode read and write commands resemble standard serial EEPROM operations, with added security commands.
The thermally enhanced eight-pad body is nominally 2 × 3 × 0.6 mm.
32 Kbit EEPROM arranged as 16 zones of 2 Kbit each, with independent zone access rules.
Secure storage for up to sixteen 128-bit keys and a unique die serial number.
AES-128/AES-CCM, message authentication, internal random-number generation, and encrypted zone reads/writes.
Sixteen high-endurance monotonic EEPROM counters can support configured application policies.
The LCDChip catalog and package registry use 8-UFDFN Exposed Pad. Microchip's exact MAH ordering code specifies an eight-pad 2 × 3 × 0.6 mm thermally enhanced UDFN. Use the manufacturer-controlled 8MA2 outline and land pattern, and confirm pad orientation and exposed-paddle treatment for the board design.

The registered package JPG is absent locally and returns HTTP 404 on the production site. This draft must remain unpublished until the correct image is restored and visually verified.
Microchip's ATAES132A eight-pad UDFN top-view pinout assigns these SPI-mode functions:
SPI chip select.
SPI serial data output.
Not used in this device's SPI mode.
Ground supply.
SPI serial data input in the EQ variant.
SPI serial clock input.
Not used in SPI mode.
Positive supply.
Do not transfer the ER I2C pin behavior or standard EEPROM hold/write-protect assumptions to this SPI configuration without checking the manufacturer pin-list appendix.
| Memory capacity | 32 Kbit EEPROM |
|---|---|
| User-zone organization | 16 zones × 2 Kbit (256 bytes each) |
| EQ interface | SPI, modes 0 and 3 |
| Maximum SPI clock | 10 MHz at VCC 2.5 V to 5.5 V |
| Supply range | 2.5 V to 5.5 V |
| Operating temperature | -40 °C to +85 °C |
| Cryptography | AES-128, including AES-CCM authentication |
| Key storage | Up to sixteen 128-bit keys |
| Monotonic counters | 16 high-endurance EEPROM counters |
| EEPROM physical page | 32 bytes; writes cannot cross a page boundary |
| Sleep current | 0.10 µA typical at VCC 3.3 V under the stated sleep conditions |
| Package | Eight-pad 2 × 3 × 0.6 mm UDFN, small tape-and-reel option |
Typical values are not guaranteed limits. Check the complete manufacturer tables for voltage, temperature, timing, and configured power state.
ATAES132A-MAHEQ-T uses the same MAH UDFN and EQ SPI interface but a different reel size. ATAES132A-MAHER variants use I2C instead of SPI and are not an automatic host-protocol substitute. Standard 32 Kbit SPI EEPROMs can differ in voltage range, page-write behavior, pin functions, security commands, and personalization; pin similarity alone does not establish drop-in equivalence. Verify the exact ordering code and zone/key configuration. No unverified internal product link is asserted.
Microchip Technology's ATAES132A 32K AES Serial EEPROM Complete Data Sheet, DS40002023A, explicitly identifies ATAES132A-MAHEQ-S as the UDFN SPI small-reel variant. Its pin configuration, electrical, memory, and security sections were used for this detail. Follow current controlled documentation and qualification notices.
Validate consumables or replaceable modules with configured AES-based challenge responses.
Apply zone-specific access rules to sensitive calibration or identity records.
Store authenticated or encrypted data used by an embedded controller.
Use a monotonic counter within a carefully designed entitlement or consumption flow.
Inspect the full MAHEQ-S ordering code, lot traceability, UDFN geometry, and intended personalization state. Confirm that configuration and key loading occurred through a trusted process and that host secrets remain protected. Catalog identification alone does not prove the authenticity of physical inventory.
No. EQ is SPI; ER identifies the I2C option in Microchip's ordering table.
It is the small tape-and-reel option for MAH, listed at 3,000 units per reel by Microchip.
Not while the registered production UDFN package JPG returns HTTP 404.
Review the latest controlled data sheet for SPI timing, mode, power-state commands, 32-byte page boundaries, UDFN assembly, key provisioning, zone locking, and host-side authentication. Do not infer that an unpersonalized device provides an active security policy. Restore and visually verify the missing package image before publication.
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