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AT88SC0204C-MJTG is a Microchip Technology secure EEPROM contact module with 2 Kbit of user memory in four 64-byte zones. The MJTG suffix identifies the M2 J module with a two-wire interface in the manufacturer's 2015 full specification.
Exact order-code protocol and contacts were checked against the later manufacturer full specification; capacity and module geometry were checked against the AT88SC0204C summary datasheet.
The AT88SC0204C combines nonvolatile user storage with independently programmable zone access, symmetric mutual authentication, encrypted checksums, and stream encryption. The MJTG ordering code is a two-wire-only M2 J smart-card module. Its interface must not be confused with the ISO T=0 MJ version, even though both use the M2 J physical format.
Four 64-byte zones can carry different access policies.
Dynamic symmetric authentication and protected communication are supported.
The MJTG suffix selects the synchronous two-wire module configuration.
The documented round-glob-top contact module fits M2 J mechanical requirements.
Programmable rights, keys, and passwords control user-zone operations.
The family provides a 2-Kbit configuration zone with a 37-byte OTP region and 160 bytes for keys and passwords.
Single-byte and 16-byte page writes are documented, subject to programmed permissions.
The manufacturer feature summary lists 100,000 write cycles and 10-year retention under specified conditions.
The product catalog records M2 J, Smart Card Module (TWI), agreeing with the later manufacturer ordering table. The M2 J exposed contact area is 12.6 × 11.4 mm, with an 8.5 mm-diameter round glob top, nominal 0.58 mm thickness, and 14.25 mm carrier pitch. A punched module may measure larger than the exposed metal area. The workbook's canonical package name is M2 J; its descriptive entry says ISO and requires registry review, but that description must not override this order code's TWI designation.

The registered M2-J JPG is absent locally and returns HTTP 404 on the production site; this draft cannot be published until the image and registry description are verified.
The contact map follows the 2015 manufacturer's TWI smart-card-module drawing for the CryptoMemory family.
Positive supply input, 2.7 V to 5.5 V.
Synchronous two-wire serial clock.
Ground reference.
Bidirectional serial-data contact.
No connection in the TWI-module drawing.
C2 is a reset input only on the ISO module; it is unconnected on this MJTG TWI configuration.
| Exact order code | AT88SC0204C-MJTG |
|---|---|
| Manufacturer | Microchip Technology / Atmel CryptoMemory |
| User EEPROM | 2 Kbit (256 bytes) |
| User zones | Four zones, 64 bytes each |
| Configuration zone | 2 Kbit |
| OTP area | 37 bytes |
| Key/password area | 160 bytes |
| Supply range | 2.7 V to 5.5 V |
| Module/protocol | M2 J, two-wire-only |
| Module temperature range | 0 °C to +70 °C |
| Two-wire compatibility | 1.0 MHz compatibility in manufacturer feature summary |
| Write endurance | 100,000 cycles in manufacturer feature summary |
| Data retention | 10 years in manufacturer feature summary |
Apply the detailed command timing, security setup, and test conditions from the controlled full specification; these summary figures are not unconditional guarantees.
AT88SC0204C-MJ shares the M2 J physical format but differs in protocol capability from MJTG. MPTG is a two-wire M2 P module with different glob-top construction. Neither variant is an unconditional substitute. Compare exact suffix, reader contacts, protocol, security personalization, temperature, and mechanics. No internal product link is added without exact API confirmation and a justified substitute relationship.
Microchip hosts both the 2013 AT88SC0204C summary datasheet and the later 2015 CryptoMemory full specification. The latter explicitly maps MJTG to M2 J–TWI. The older summary's ordering row says ISO for MJTG; its package note allows TWI, and the later full specification resolves the ordering-label inconsistency. Verify current revisions and lifecycle before procurement.
Partitioned memory in contact-card systems with a two-wire host.
Embedded equipment that stores access-controlled configuration.
Separate logical files with different zone permissions.
Host-device designs using documented symmetric key management.
Check the full MJTG order code, round M2 J glob top, contact quality, carrier orientation, markings, traceability, and material documents. Validate two-wire communication and personalized security in production tests. A catalog listing does not prove source provenance or secure provisioning.
2 Kbit, or 256 bytes, in four 64-byte zones.
The later manufacturer full specification identifies MJTG as the M2 J two-wire module.
No. C2 is unconnected in the TWI-module contact map.
No. MPTG uses M2 P construction with a square glob top, whereas MJTG uses M2 J with a round glob top.
Security depends on correct host implementation, key provisioning, access control, and fuse programming. Use the later controlled manufacturer ordering table for this exact suffix and resolve the workbook's ISO description before release. Publication is blocked until the correct M2 J production JPG is accessible and visually verified.
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