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Analog Devices AD9960BSTZ is a half-duplex wireless mixed-signal front end in an 80-lead LQFP package (ST-80-1). It combines receive conversion, transmit conversion, digital filtering and auxiliary control functions for RFID-reader signal chains.
The AD9960 MxFE integrates simultaneous I/Q receive sample-and-hold circuits feeding a multiplexed 14-bit ADC and dual 12-bit transmit DACs. Programmable CIC and FIR filters reduce external DSP processing. A shared clock architecture and bidirectional 16-bit data bus support half-duplex operation; the actual clock plan and framing must be designed from the controlled data sheet.
Dual sampling inputs and a multiplexed 14-bit ADC support I/Q capture.
Dual 12-bit DACs generate I/Q outputs with on-chip interpolation.
Rx and Tx CIC/FIR blocks can reduce the burden on the host DSP.
Additional ADC, DAC and GPIO resources support system monitoring and control.
Two simultaneous sample-and-hold inputs; 14-bit muxed ADC; 32 MSPS per channel capability.
Two 12-bit, 32 MSPS current-output DAC channels.
16-bit bidirectional data port with frame-sync and data-clock signals.
Three- or four-wire SPI, nine programmable GPIOs and optional internal clock doubling.
ADI lists AD9960BSTZ as the 80-lead low-profile quad flat package, option ST-80-1. The drawing specifies a nominal 12 mm square body, 14 mm nominal lead span and 0.50 mm lead pitch. Use the controlled outline and pin-one marking for PCB layout; the local 80-LQFP artwork and register entry still require confirmation.

The expected local JPG is missing; this page must remain unpublished.
Pin groups below come from ADI's AD9960 Rev. 0 pin-function table; use the full pin table and drawing for schematic capture.
VIN_I−/VIN_I+ at pins 3/4 and VIN_Q+/VIN_Q− at pins 6/7.
IOUT_I−/IOUT_I+ at pins 12/13 and IOUT_Q+/IOUT_Q− at pins 16/17.
ADIO[15:0] at pins 42–57; TX_RXEN at 41, FS at 58 and DCLK at 59.
SEN, SCLK, SDIO and SDO at pins 65, 64, 63 and 62; CLKIN at 69.
AVDD/AVSS, DVDD/DVSS, DRVDD/DRVSS and clock rails have separate pins; follow the manufacturer decoupling and return-path guidance.
| Manufacturer | Analog Devices, Inc. |
|---|---|
| Orderable model | AD9960BSTZ |
| Function | Half-duplex mixed-signal front end |
| Receive conversion | 14-bit multiplexed ADC, 32 MSPS per I/Q channel capability |
| Transmit conversion | Dual 12-bit DACs, 32 MSPS |
| Auxiliary ADC | Three 10-bit muxed ADCs, ten analog inputs total |
| Auxiliary DAC | Two 10-bit voltage-output DACs |
| Host data port | Bidirectional 16-bit parallel |
| Configuration interface | Three- or four-wire SPI |
| Nominal supplies | 3.3 V analog and digital, data-sheet test condition ±10% |
| Specified ambient range | −40°C to +85°C |
| Package | 80-lead LQFP, ST-80-1 |
Limits and typical performance depend on clocking, filters, load and data-sheet test conditions; consult the controlled tables before design release.
No LCDChip alternative is qualified here. A related MxFE device is not automatically interchangeable: compare Rx/Tx resolution and rates, filter architecture, SPI register map, 16-bit bus timing, supply rails, thermal range and exact ST-80-1 pinout. Add an internal product link only after an exact catalog match and engineering comparison.
Analog Devices identifies AD9960BSTZ as a production part and provides the AD9960 Rev. 0 controlled data sheet and ST-80-1 outline. The manufacturer's ordering guide specifies the full BSTZ code for the 80-lead LQFP, −40°C to +85°C version. Verify the current manufacturer ordering status and lot documents before purchase.
Integrated conversion and filtering for reader baseband signal chains.
Systems that switch between I/Q receive and transmit processing.
Baseband interfaces using the bidirectional parallel data port.
Controlled mixed-signal evaluation with auxiliary monitoring and GPIO.
Check the manufacturer mark, complete order code, date and lot code, moisture handling and traceable supply chain. The site's inventory and price are maintained in separate catalog fields, not in this engineering description. Obtain a dated authorized distributor quote and verify tier prices before any pricing change or publication.
No. It is a mixed-signal baseband front end; RF conversion, analog filtering and system control require external design.
The AD9960 targets half-duplex use. Confirm the timing and TX_RXEN control sequence in the data sheet.
ADI specifies ST-80-1 for the 80-lead LQFP order code.
No. The local package JPG and distributor price/stock reconciliation are incomplete.
Use the Analog Devices AD9960 controlled data sheet for electrical and pin-level design. Before publication, confirm the local 80-LQFP package register entry and JPG, reconcile dated authorized stock and tier pricing, inspect the rendered page and complete human review. No substitute or release approval is implied.
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