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Microchip Technology ATAES132-SH-ER-T
- Part No.:
- ATAES132-SH-ER-T
- Manufacturer:
- Microchip Technology
- Category:
- Specialized ICs
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Description:
- IC AUTHENTICATION CHIP 8SOIC
- Quantity:
Unit Price:$0
Ext Price:$0
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Product Details
ATAES132-SH-ER-T - 32-Kbit AES Secure EEPROM
ATAES132-SH-ER-T is an Atmel / Microchip secure serial EEPROM combining 32 Kbits of nonvolatile storage with an AES-128 cryptographic engine. The exact ER-T ordering code is the I2C-interface, 8-lead SOIC, tape-and-reel option.
The exact suffix, security functions and pinout follow Microchip's Atmel-8760C ATAES132 data sheet and its ordering appendix.
Overview
ATAES132 provides authenticated and confidential nonvolatile data storage. Its AES-128 engine supports AES-CCM operations for authentication and encryption/decryption, while sixteen user zones can be assigned independent access permissions. This SH-ER-T variant uses I2C; the SH-EQ-T variant is a separate SPI ordering option.
Key Advantages
The AES-128 cryptographic engine supports authenticated transactions without keeping every secret in host memory.
Sixteen user zones permit independently configured access rights.
The ER ordering form uses SDA and SCK with the ATAES132 operating as an I2C slave.
Sixteen 128-bit keys can be associated with protected zones or standalone authentication functions.
Feature Summary
AES-128 in AES-CCM mode for authenticated encryption and message authentication.
32-Kbit serial EEPROM partitioned into sixteen configurable user zones.
Device features support controlled third-party provisioning and key management.
SH-ER-T denotes an 8S1 SOIC, I2C interface and tape-and-reel delivery.
Package & Footprint
Microchip lists ATAES132-SH-ER-T as an 8S1, 0.150-inch-wide-body JEDEC SOIC with I2C and tape-and-reel delivery. Its ordering appendix describes 4,000 SOIC devices per reel. LCDChip's registered package name is 8-SOIC; use the controlled manufacturer outline and land pattern for PCB design.
- Verify the top-view pin-one orientation.
- Connect SDA and SCK to a compatible I2C host, with an external SDA pull-up.
- Leave pins 3 and 7, marked NC, unconnected; tie unused CS as specified by the manufacturer.
The generic package image is not a device-specific pin diagram.
Pin Functions
Microchip's ATAES132 SOIC pin table assigns these terminals in I2C mode.
The EQ SPI configuration has different serial behavior; always use the exact ordering suffix.
Key Specifications
| Device function | AES secure serial EEPROM |
|---|---|
| User EEPROM | 32 Kbits |
| User zones | 16 independently configurable zones |
| Key resources | 16 keys of 128 bits each |
| Cryptographic engine | AES-128 |
| Authenticated mode | AES-CCM |
| Interface | I2C slave, ER ordering option |
| Supply voltage | 2.5 V to 5.5 V |
| Operating temperature | -40 C to +85 C industrial option |
| Package | 8S1 SOIC; registry 8-SOIC |
| Delivery form | Tape and reel, 4,000 SOIC devices per reel |
Consult the controlled data sheet for electrical limits, command timing and configuration-dependent behavior.
Replacement Considerations
ATAES132-SH-EQ-T uses SPI rather than I2C and is not a direct interface substitute. A successor or another AES device must also be checked for key provisioning, zone configuration, command set, package and electrical compatibility. No unverified internal alternative link or unconditional drop-in claim is asserted.
Manufacturer Information
ATAES132 originated with Atmel and is documented by Microchip Technology in the Atmel-8760C CryptoAuthentication data sheet. That document's ordering table explicitly distinguishes EQ SPI and ER I2C variants.
Applications
Validate replaceable modules with a host-controlled AES protocol.
Store calibration or configuration data in access-controlled zones.
Protect application-specific records in smart-meter or embedded designs.
Use authenticated encrypted transfers where system requirements support them.
Quality & Authenticity
Verify reel and lot traceability, the complete ordering code and the configured key state through controlled tests. Microchip states that package markings use a lot-specific trace code rather than the full ordering code; package marking alone cannot prove the I2C variant or personalization state.
FAQ
Is ATAES132-SH-ER-T an SPI or I2C device?
It is the I2C version. The EQ suffix identifies the separate SPI option.
How much user memory does it provide?
The device has 32 Kbits of EEPROM organized into sixteen user zones.
What does the T suffix mean?
It identifies tape-and-reel delivery for the SOIC ordering option.
Does the IC alone provide system security?
No. Key provisioning, host verification, access policy and threat analysis are also required.
Engineering Notice
Check Microchip's latest ATAES132 data sheet, errata, electrical specifications and 8S1 package drawing before final schematic, firmware, provisioning or PCB release. Preserve the exact ER I2C suffix; the EQ SPI variant has different interface behavior. This page does not replace a system-level security review.
ATAES132-SH-ER-T Information
- Specifications
- Tags
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- CryptoAuthentication™
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Type:
- Authentication Chip
- Applications:
- Networking and Communications
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
- Grade:
- -
- Qualification:
- -
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