Hello! now
tms@lcdchip.com
NXP USA Inc. SE050F2HQ1/Z018HZ
- Part No.:
- SE050F2HQ1/Z018HZ
- Manufacturer:
- NXP USA Inc.
- Category:
- Specialized ICs
- Package:
- 20-XFQFN Exposed Pad
- Description:
- IC PLUG/TRUST SEC ELEM 20HX2QFN
- Quantity:
Unit Price:$0
Ext Price:$0
- Payment:
- Shipping:
Product Details
SE050F2HQ1/Z018HZ - Plug & Trust Secure Element
SE050F2HQ1/Z018HZ is an NXP SE050F2 secure element for credential storage and cryptographic operations in connected devices. NXP lists this exact orderable part in a 20-terminal HX2QFN package; LCDChip registers it as 20-XFQFN Exposed Pad.
Feature availability and credential provisioning depend on the exact F2 configuration and current NXP documentation.
Overview
The SE050 family provides an IC-level root of trust for securely storing credentials and performing cryptographic operations. Its Java Card operating system and IoT security applet are supported by NXP Plug & Trust middleware. The SE050F2HQ1/Z018HZ ordering row explicitly identifies the F2 variant; integrators must check the separate configuration document for the exact algorithm and feature set enabled in this variant.
Key Advantages
Security-critical credentials and operations are held outside general-purpose host memory.
The package exposes I2C target signals and optional ISO 7816 and ISO 14443 connections.
NXP's HX2QFN20 body measures 3 mm × 3 mm × 0.32 mm with 0.4 mm pitch.
Plug & Trust middleware and evaluation resources support secure-element integration.
Feature Summary
Designed for provisioning and use of device credentials in connected systems.
The SE050 platform supports hardware-assisted security operations; verify F2-specific enablement.
ENA, VIN, VOUT and VCC connections support the documented deep power-down architecture.
I2C, ISO 7816 and ISO 14443 pads are documented in the manufacturer's pin table.
Package & Footprint
The API's original package is 20-XFQFN Exposed Pad. NXP describes the exact SE050 orderable part in an HX2QFN20, SOT1969-1, 3 mm × 3 mm × 0.32 mm, 0.4 mm-pitch package. Confirm the controlled SOT1969-1 drawing and land pattern rather than assuming every generic XFQFN footprint is interchangeable. The center pad is not electrically connected; NXP recommends grounding it for thermal reasons.
- Check SOT1969-1 terminal-one orientation and the 0.4 mm pitch.
- Review center-pad grounding and thermal design.
- Route unused interface pins according to NXP's pin table.
The expected JPG is absent locally and returns HTTP 404 on the production site; do not publish until the correct visual is restored and inspected.
Pin Functions
NXP's HX2QFN20 table assigns I2C_SDA to pin 9 and I2C_SCL to pin 10. ENA is pin 11, VIN pin 12, VOUT pin 15, VCC pin 18 and VSS pin 19. Optional ISO 14443 antenna pins are LB at pin 1 and LA at pin 17; ISO 7816 functions occupy IO1 pin 3, CLK pin 13, RST_N pin 14 and IO2 pin 16. Pins 2, 4–8 and 20 are not connected.
Target data and clock.
Deep power-down enable and interface supply input.
Logic supply and ground.
Supply output used with VCC for the documented deep power-down connection.
The manufacturer's table gives specific tie-off choices for unused ISO interface and antenna pads; follow those instructions for the selected operating mode.
Key Specifications
| Exact orderable part | SE050F2HQ1/Z018HZ |
|---|---|
| Variant | SE050F2 |
| Function | Plug & Trust secure element |
| Package | HX2QFN20, SOT1969-1, 20 terminals |
| Package dimensions | 3 mm × 3 mm × 0.32 mm; 0.4 mm pitch |
| Recommended VCC / VIN | 1.62 V minimum, 1.8 V typical, 3.6 V maximum |
| Ambient operating temperature | -40°C to +105°C |
| Primary host interface | I2C target on pins 9 and 10 |
| Other documented interfaces | ISO 7816 and ISO 14443 pads; mode and feature enablement require configuration review |
| Center pad | Not electrically connected; grounding recommended for thermal reasons |
| Power management | Deep power-down mode supported with specified ENA, VIN, VOUT and VCC connections |
| Reel format | Manufacturer lists 7-inch tape-on-reel packing for HX2QFN20 |
Values are drawn from NXP's SE050 data sheet Rev. 3.8. Confirm the F2 variant configuration and interface timing in the latest controlled documents before design release.
Replacement Considerations
Other SE050 variants may share the HX2QFN20 pinout but differ in enabled algorithms, credential profiles, applet configuration and lifecycle state. Compare the exact NXP variant and orderable suffix, middleware behavior, provisioning process, supply scheme and certified security boundary. A mechanically similar secure element is not automatically a software or credential-compatible replacement. No unverified internal alternative is linked.
Manufacturer Information
NXP Semiconductors' SE050 Plug & Trust Secure Element product data sheet Rev. 3.8 lists SE050F2HQ1/Z018HZ as an orderable F2 part and documents the HX2QFN20 pinout, package, power and operating conditions. Consult NXP's separate variant-configuration material for F2-specific security functions.
Applications
Protect device credentials used for authenticated connections.
Support a credential-backed authentication workflow.
Provision identity and policy within a managed product lifecycle.
Apply cryptographic controls where supported by the exact configuration.
Quality & Authenticity
Verify the exact orderable suffix, manufacturer traceability, top marking, HX2QFN20 dimensions and pin-one indication. Use authorized provisioning and test credentials to check secure-element behavior. Validate I2C electrical margins, selected interface wiring and the deep power-down supply path in the intended host design.
FAQ
Does the exact suffix identify the F2 variant?
Yes. NXP's ordering table maps SE050F2HQ1/Z018HZ to SE050F2.
What package drawing is required?
Use the HX2QFN20 SOT1969-1 controlled drawing and land pattern, not only a generic XFQFN description.
Can VOUT simply be left open?
Only if the selected power mode permits it; NXP specifies a VOUT-to-VCC connection when deep power-down mode is used.
Why is this detail unpublished?
The registered package JPG is missing from the production site.
Engineering Notice
Review NXP's current F2 variant configuration, security recommendations, interface mode, unused-pin tie-offs and power architecture before committing a design. Restore and verify the production package JPG before formal publication.
SE050F2HQ1/Z018HZ Information
- Specifications
- Tags
- Product attributes
- Attribute value
- Manufacturer:
- NXP USA Inc.
- Series:
- -
- Package/Case:
- 20-XFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Plug and Trust Secure Element
- Applications:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-HX2QFN (3x3)
- Grade:
- -
- Qualification:
- -
- Include Parts
- Popular Search
The following parts include "SE050F2HQ1/Z018HZ" in Silicon Labs SE050F2HQ1/Z018HZ.
- Part Number
- Manufacturer
- Package
- Description
- CAP200DG-TL Power Integrations 8-SOIC (0.154", 3.90mm Width) IC AUTOMATIC DISCHARGE 8SO
- ATSHA204A-MAHDA-T Microchip Technology 8-UFDFN Exposed Pad IC AUTHENTICATION CHIP 8UDFN
- ATSHA204A-SSHDA-T Microchip Technology 8-SOIC (0.154", 3.90mm Width) IC AUTHENTICATION CHIP 8SOIC
- ATSHA204A-STUCZ-T Microchip Technology TO-236-3, SC-59, SOT-23-3 IC AUTHENTICATION CHIP SOT23-3
- ATECC608B-MAHDA-T Microchip Technology 8-UFDFN Exposed Pad IC AUTHENTICATION CHIP 8UDFN
- ATECC608B-MAHCZ-S Microchip Technology 8-UFDFN Exposed Pad IC AUTHENTICATION CHIP 8UDFN
- ATECC608B-SSHDA-T Microchip Technology 8-SOIC (0.154", 3.90mm Width) IC AUTHENTICATION CHIP 8SOIC
- ATECC608B-MAHDA-S Microchip Technology 8-UFDFN Exposed Pad IC AUTHENTICATION CHIP 8UDFN
- ATECC608A-MAHDA-S Microchip Technology 8-UFDFN Exposed Pad IC AUTHENTICATION CHIP 8UDFN
- ATECC608B-MAVDA-T Microchip Technology 8-UFDFN Exposed Pad IC AUTHENTICATION CHIP 8UDFN
The following parts are popular search parts in Test and Measurement.
Inventory:4,857
Please send an inquiry. Send us your inquiry, and we will respond immediately.
