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Texas Instruments LM317LIDR is an adjustable three-terminal positive linear regulator for 1.25 V to 37 V outputs and load currents up to 100 mA, supplied in an 8-pin SOIC tape-and-reel package.
Electrical, pin, package, and ordering details were checked against TI data sheet SLCS144G and the exact LM317LIDR manufacturer page.
The LM317LIDR uses two external resistors to set a positive output from 1.25 V to 37 V. Its floating architecture responds to the input-to-output differential rather than ground-referenced input voltage. Internal current limiting and thermal overload protection support low-current adjustable rails, precision current sources, and tracking supplies.
Two resistors program output voltage across the supported 1.25 V to 37 V range.
The regulator operates from the input-to-output differential, enabling high-side uses within rated limits.
An output capacitor is not required for basic stability, although it can improve transient response.
Current limiting and thermal overload protection reduce external protection complexity.
Supplies regulated output current from the specified minimum load through 100 mA.
The output-to-adjustment reference is approximately 1.25 V under specified conditions.
An adjustment-pin bypass capacitor can substantially improve 120 Hz rejection.
The LM317LI grade is specified from -40 degrees C to +125 degrees C junction temperature.
TI identifies D as an 8-pin SOIC. The catalog records it as 8-SOIC (0.154 inch, 3.90 mm body width), and the existing registry image is used.

The registered JPG exists locally, returned HTTP 200 as JPEG in production, and was visually checked as an eight-lead SOIC illustration.
The assignment below applies to the D-package top view.
| Manufacturer | Texas Instruments |
|---|---|
| Regulator type | Adjustable positive linear regulator |
| Output-voltage range | 1.25 V to 37 V |
| Recommended differential | 2.5 V to 37 V from INPUT to OUTPUT |
| Output-current range | 2.5 mA to 100 mA |
| Reference voltage | Approximately 1.25 V from OUTPUT to ADJUSTMENT; exact limits depend on chip revision |
| Typical dropout | Approximately 2 V |
| Typical line regulation | As low as 0.007% per volt for the new chip under stated conditions |
| Output regulation | 25 mV at 25 degrees C for outputs at or below 5 V under stated conditions |
| Ripple rejection | 55 dB minimum without adjustment bypass; up to 71.5 dB typical for the new chip with bypass at 120 Hz |
| Output noise | 10 microvolts per volt, 10 Hz to 10 kHz, typical |
| Adjustment current | 44 microamperes typical, 57 microamperes maximum for the new chip |
| Operating junction temperature | -40 degrees C to +125 degrees C |
| SOIC thermal resistance | Approximately 96.5 to 98.18 degrees C/W junction-to-ambient depending on chip revision |
| Package and media | 8-pin SOIC (D), 2,500-piece large tape-and-reel |
TI supplies legacy and new chip revisions under this orderable part. Use the applicable data-sheet limits and quality information for the received lot.
A candidate replacement must match the adjustable range, 100 mA requirement, allowed differential, minimum load, D-package footprint, unusual multiple-OUTPUT pin map, reference behavior, adjustment current, protection, and thermal limits. Standard three-pin LM317 variants are not footprint-compatible with this SOIC assignment.
No internal replacement link is asserted without an exact API-confirmed catalog match and engineering review.
Texas Instruments lists LM317LIDR as active. LM317L identifies the 100 mA adjustable regulator family, I identifies the -40 degrees C to +125 degrees C grade, D identifies the 8-pin SOIC, and R identifies the 2,500-piece large tape-and-reel option. TI quality data lists device marking L317LI.
Generate a board-level voltage selected by two external resistors.
Use the reference voltage with a programming resistor to establish a controlled current.
Build positive supplies that follow a reference or companion rail.
Reduce ripple after a preregulator when differential voltage and dissipation are controlled.
Confirm the exact LM317LIDR order code, L317LI marking, reel label, SOIC dimensions, pin-1 indicator, and lot traceability during incoming inspection. Package appearance alone does not establish authenticity. Electrical verification must account for the applicable TI chip revision.
Use two external resistors between OUTPUT, ADJUSTMENT, and ground according to TI's design equation.
No capacitor is required for basic stability, but an output capacitor can improve transient response.
Pins 2, 3, 6, and 7 are internally connected and must be treated as the common regulated-output node.
The recommended operating range begins at 2.5 mA; verify the applicable revision-specific regulation conditions.
No. Design to the 100 mA recommended maximum and the package thermal limit.
Validate differential voltage, programmed output, minimum load, current limit, capacitor placement, protection diodes for stored-energy nodes, and junction temperature in the final circuit. Power dissipation is approximately (VIN minus VOUT) multiplied by load current plus bias effects.
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