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AD9267BCPZRL7 is the Analog Devices reel-order code for the dual continuous-time sigma-delta modulator in a 64-lead, 9 mm by 9 mm LFCSP with exposed pad. Its 10 MHz real or 20 MHz complex bandwidth supports wideband receiver signal chains.
The RL7 suffix identifies reel ordering; confirm reel label, lot and exact package drawing before assembly.
The AD9267 integrates two continuous-time sigma-delta modulator channels with resistive analog inputs and fifth-order loop filters. A 32-times oversampling architecture provides four-bit differential LVDS data for each channel at a 640 MSPS modulator rate. Differential DCO outputs clock downstream capture circuitry.
Two channels suit I/Q baseband reception and quadrature instrumentation.
Continuous-time filtering supports 10 MHz real or 20 MHz complex signal bandwidth.
The differential DCO signal simplifies synchronization with receiving logic.
The RL7 ordering suffix is the tape-and-reel option, relevant to automated assembly procurement.
A fifth-order continuous-time loop filter and 32-times oversampling reduce out-of-band response.
A differential input clock or integrated integer-N PLL supplies conversion timing.
An SPI-compatible serial interface configures modes and device functions.
Channel overrange and PLL lock indications assist system monitoring.
ADI specifies a 64-lead LFCSP, 9 mm by 9 mm, with an exposed paddle for this RL7 code. The catalog case name is 64-VFQFN Exposed Pad, CSP. The local register has only a broader 64-VFQFN Exposed Pad entry, not this exact CSP-suffixed name.

The exact registered JPG is absent and must be reviewed before publication.
The ADI Rev. 0 data sheet has the numbered 64-lead pin table. These groups provide design context; use the original pin table for wiring.
VIN+A/VIN−A and VIN+B/VIN−B are differential inputs; VREF and CFILT serve the reference path.
CLK+/CLK− accept differential clocking; PLLMULT pins select mode and PLL_LOCKED reports lock.
D0± through D3± on both channels carry LVDS data; DCO± and OR± convey data timing and overrange.
CSB, SCLK, SDIO, RESET and PDWN configure operation; AVDD, DVDD, DRVDD and CVDD supply domains require the documented layout.
Do not connect DNC leads. The exposed paddle, identified as pin 65, must be joined to analog ground.
| Exact order code | AD9267BCPZRL7 |
|---|---|
| Manufacturer | Analog Devices |
| Function | Dual continuous-time sigma-delta modulator |
| Signal bandwidth | 10 MHz real or 20 MHz complex |
| Modulator rate | 640 MSPS |
| Oversampling ratio | 32 times |
| Digital output | Four-bit differential LVDS per channel |
| SNR | 83 dB (85 dBFS) to 10 MHz input, stated condition |
| Noise figure | 15 dB, stated condition |
| Power | 416 mW, stated operating condition |
| Analog supply | 1.8 V |
| Specified temperature | −40 °C to +85 °C |
| Package and supply | 64-lead 9 mm x 9 mm LFCSP; RL7 reel ordering |
Typical performance and operating limits depend on test conditions; use ADI's controlled data sheet for design limits.
AD9267BCPZ is the tray-order option of this ADI family, while AD9267BCPZRL7 is the reel-order option. Packaging format does not establish lot or procurement equivalence; confirm the full marking, footprint and assembly process. A different modulator requires checks of channel count, 640 MSPS LVDS format, bandwidth, SPI configuration, clocking, supply rails and board layout. No unverified internal alternative link is included.
ADI's product page lists AD9267BCPZRL7 as an exact order code in the 64-lead LFCSP and shows production status, while warning that the family is not recommended for new designs. The Rev. 0 data sheet supplies architecture, performance and pin functions. Distributor reel quantity and current price should be checked independently for procurement.
Wideband quadrature baseband signal conversion.
Two-channel sampling in high-dynamic-range test equipment.
Reel-format supply for an existing qualified AD9267 board.
Replacement procurement for products already designed around the AD9267.
Verify reel labeling, full manufacturer order code, date and lot codes, moisture handling, package dimensions and traceability. Check storage and placement history for independent-distributor inventory. This detail does not claim verified live stock or an authorized current-production lot.
It is ADI's reel-order option for this exact family model; confirm the supplier's reel quantity and label.
Each channel outputs four-bit differential LVDS data with a differential data clock.
No. ADI marks the family not recommended for new designs, despite listing this exact code in production.
No. The exact case registration and local JPG are pending review.
Keep this detail under review until the exact package registry entry and JPG, supplied-lot reel labeling, orderability and a qualified current stock/price quote are confirmed. Do not publish while any gate remains open.
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