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Rochester Electronics lists 74S288N as a 32-word by 8-bit, 256-bit TTL programmable read-only memory in a 16-pin plastic dual-inline package. It serves established logic systems that rely on a one-time-programmed lookup pattern.
Five address inputs select one of 32 eight-bit words. When enabled, the eight outputs present the selected stored word; when disabled, the outputs enter a high-impedance state. The original National Semiconductor DM74S288 family document describes fuse-programmed nonvolatile storage. Exact Rochester 74S288N programming, timing and package details should be confirmed from its controlled manufacturer sheet before production use.
The original family data describes titanium-tungsten fuse links, five address inputs, one output-enable control and eight three-state outputs. Unprogrammed devices are shipped with low bits throughout, and selected high bits are programmed with the specified procedure. These details are family-level design guidance, not proof that any offered unit is blank or carries the required customer image.
Rochester's exact-code listing identifies PDIP16, 16 pins, tube packaging and a 25-piece package quantity. The catalog's package field is blank, while the package register has a generic 16-DIP entry marked missing image. Confirm body dimensions, pin-one orientation and the lot's actual package against the controlled outline before PCB work.

The 16-DIP JPG is not present locally.
The original DM74S288 dual-inline top-view drawing places Q0 through Q6 on pins 1 through 7, ground on pin 8, Q7 on pin 9, A0 through A4 on pins 10 through 14, output enable on pin 15 and VCC on pin 16. Verify the exact Rochester-released pin map and enable polarity before fitting a programmed device into a socket.
| Exact order code | 74S288N |
|---|---|
| Memory type | One-time-programmable TTL PROM |
| Organization | 32 words by 8 bits |
| Total capacity | 256 bits |
| Address inputs | Five, A0 to A4 |
| Data outputs | Eight, Q0 to Q7 |
| Output control | Enable input; high-impedance disabled state |
| Original family technology | Schottky TTL with Ti-W fuse links |
| Rochester package | PDIP16, 16 pins |
| Mounting | Through hole |
| Rochester packaging | Tube, 25-piece package quantity |
| Rochester lifecycle | Active on indexed exact-code product page |
The original DM74S288N data gives a 35 ns maximum address access time at commercial conditions, but it is not asserted here as a guaranteed Rochester exact-order limit without controlled-document confirmation.
No database-verified internal substitute is linked. DigiKey describes this part as an alternate for 27S19PC, but alternate wording alone does not establish pin, programming or image compatibility. Replacements must match organization, enable polarity, access timing, output drive, package and, critically, the programmed fuse pattern.
Rochester Electronics' exact 74S288N product listing identifies the 32-by-8 TTL PROM, PDIP16 case, tube supply and pricing tiers. The original National Semiconductor DM54S288/DM74S288 document explains the family architecture and the N-package pin diagram. Rochester's exact-code linked datasheet should be reviewed before transferring original-manufacturer timing or programming limits.
Confirm Rochester traceability and whether the units are blank or already programmed. Read and archive the full 32-by-8 image before any replacement. The catalog records 1,754 units at USD 9.36, minimum quantity 12, with no tiers. Indexed Rochester and DigiKey exact-code pages show materially different stock and USD tier prices; availability and quotation terms must be reconfirmed with the seller before publication.
No. The documented fuse-based architecture is one-time programmable.
No. The required 256-bit programmed pattern must also match.
No. Verify the full electrical, pin, package and programming requirements.
No. The catalog and indexed manufacturer/distributor snapshots conflict.
A blank PROM will not replace a programmed unit without the correct image. Validate data retention, programming method, access timing and socket orientation against controlled exact-order documentation. The blank catalog package field, missing 16-DIP JPG and unreconciled stock/pricing prevent publication.
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